Layer stackup

Layer stackup is an important and sometimes contentious issue in the deisgn of a multi-layer board.
If I give the fabricator enough information will he be able to manufacture my board? Well possibly, any material specs you give are only valid if that material is stocked by your fabricator, substitutions are often made and different materials will have different characteristics.

Obviously, the fabricator needs to know which layer goes where in the stackup and the more information given about those layers the better the chance your board will perform to expectations. The finished thickness of the board (after pressing) is most important, check value with the fabricators capability. The positions of cores and prepregs should be given with their thicknesses and any additional useful information such as Dk value and don't forget about the thickness of each of the copper layers.

Track & Gap size

It can be difficult for PCB designers to instinctively know what to do about track size and the spacing between tracks when starting a new layout. Very often what happened in the past is the starting point, however this could lead equally to 'over specifying' or 'under specifying' the design details to the manufacturer.

IPC-2221 contains very useful information, in the form of a table, regarding best practice for conductor spacing (voltage clearance) under varying conditions.

Conductor cross sectional area for thermal management can be found in IPCs new standard 'Standard for Determining Current-Carrying Capacity In Printed Board Design', IPC-2152.

But what about a generic guidelines for track & gap? This will largely be dictated by the designs complexity and any fabricators capabilities. In general track & gap should always be as large as you can 'get away with' as this enables the manufacturer to produce a cheaper and more reliable board. For low to medium density boards a minimum track & gap 'X' might apply and for denser designs a minimum track & gap of 'Y' might apply. The values for X and Y could be aligned with a fabricators capabilities, e.g. some fabricators specify their capabilities as 'standard' and 'advanced'. Typical values for 'standard' may be 90um and for 'advanced' 75um.

Unexplained component failure

When a component fails during test or out in the field and the reason is not obvious then ESD is often citied as the culprit. However, some semiconductor manufacturers suggest that EOS is more likely to be the cause.
So what's the difference between Electrostatic Discharge (ESD) and Electrical Overstress (EOS)?
ESD typically lasts for only a few nanoseconds and can be of a very high voltage, whilst EOS is a much lower voltage it can last for a much longer time. EOS is not new, it has been around for a very long time but it is becoming more common as a failure mechanism due to the increasing sensitivity of modern components.

EOS can be caused by a large variety of equipment; soldering irons, test instruments and power supplies for example, and poor grounding is often the source of the trouble.

IPC-A-610 and IPC-7711 standards both give good advice on how to minimise the effects of EOS during assembly and rework respectively.

PCB Manufacturing Documentation

It has always been important to produce accurate and comprehensive documentation for the maufacture and assembly for any design of PCB. It is often assumed that the fabricator or assembler knows what to do anyway so I'll be minimal with my paperwork. Sometimes this is true and mimimum documentation will suffice, however using the doumention tools at your disposal could prevent serious misunderstandings.

The IPC have produced a standard to help designers provide the necessary drawings and support documentation; namely IPC-D-325 this together with the tools provided by your EDA vendor should be enough for you avoid embarrassing misunderstandings.

Example: use the layer naming convention as IPC-D-325 Viz: Primary side is Layer 1

All conductive layers are then numbered sequentionally until the secondary side is reached

PCB designers should know more about PCB substrates

In today’s complex world of electronics design PCB designers need to understand which substrates materials to use and when.
This understanding will bring benefits in reliability and savings in cost. No more broken vias, better impedance control, less timing skew problems and no more mistakes made in selecting unnecessarily expensive grades of FR-4 or polyimide.

IPC-4101B Specification for Base Materials for Rigid and Multilayer Printed Boards (including RoHS compliancy data) is the most comprehensive stanadard available for making sure your impedance calculations have realistic figures and when the need to arises to talk to your fabricator about layer stack-up, borad thickness etc then you can readily appreciate how any changes may affect your design.